CADENCE - VLSI CAD
TOOL
This short tutorial aims
at learning how to run CADENCE CAD TOOL on Sun workstation. The setup
is just for the environment of the
Department of Electrical Engineering,
Arizona State University. Outside users need to modify some setup
files for their own environment.
1. Setting
up Unix Environment
2. Schematic
Entry with Composer
3. Generating
Symbol View
4. Simulation
in Simulatiors, spectre(S)
5. Layout
Editor
6.
Design Verification: DRC and Extraction
7. LVS and
Post Extraction Simulation
Now, AMI 0.6µm Standard Cell Library
is available.
Click here.
Here is a
Tip for creating Corners and running simulation.
Cadence University Software Program
Cadence University Members
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CADENCE is a trademark of Cadence Design System, Inc., 555
River Oaks Parkway, San Jose, CA 95134
Page created and maintained
by:
Sangwook Kim
Telecommunication Research Center
EE Department
Arizona State University
Tempe, AZ 85287
Phone:(480)965-1426
email: sang-wook.kim@asu.edu
Last Updated: Jan. 17, 2003