L 4.12:   Mapping window TLB misses: window_fault, first part 

(Revision 0  4 December 2000)

 

overview     window fault, first part is branched to if a tlb refill exception occurs and there is no page table entry. This leads to a tlb invalid exception handled by the general exception handler, other_except and ultimately exc_tlbs. Exc_tlbs branches here if the page fault is not in kernel TCB area (checked for on line 0 of L4.8) and not in  kernel user area  but is in XKSSEG temporary mapping area (checked for on line 7 L4.10).

This code uses the faulting VA in the sender's space and knowledge that the fault is in an XKSSEG window, and data available in the faulting senders tcb to construct the faulting VA in the receiver's space. It calls vm_lookup_pte to get the corresponding PFN and uses this to construct a tlb ENTRYLO word. It also constructs a tlb ENTRYHI word from the faulting VA and its own asid. These are used by  window fault, second part to make a tlb entry consisting of the window VA in XKSSEG and the page frame that holds the receiver's data.

data	L4_IPC_FPAGE_MASK    0x02 (m bit in message descriptor)
        L4_IPC_DECEIT_MASK   0x01 (d bit in message descriptor)
	RECEIVE_WINDOW_BASE  0x4000 0000 0000 0000 (base of XKSSEG)
	USER_ADDRESS_TOP     0x0000010000000000 (1 TB)
	TID_THREAD_MASK	     0000376000 (7 bit thread number field in tid)
	TID_THREAD_SHIFT     10 (shift to get thread # in lo order bit positions)
	RECV_WINDOW_SIZE     16*1024*1024 (16MB window size)
on entry	a0	faulting sender's tcbtop (l2 L4.10 exc_tlbs)
		s3	Exception VA (l15 L4.5 other_excpt)
		
0-6 a receiver window base address in the sender VA space is constructed by adding the sender thread number * 16MB to the base of XKSSEG (see C version of this in L5.16)
7 a1 <-- offset to faulting VA
8 a2 <-- receive window base address in receiver's VA space (from sender's tcb)
9 s5 <-- faulting address in receiver's VA space
10-13 with receiver's tcb in a0 and faulting address in receiver's VA space in a1 call vm_lookup_pte
vm_lookup_pte returns the address of a 32 bit  ENTRYLO-type word containing the PFN (see figure 2.1 page 12)
14 if there's no mapping, goto l56 L4.14 to start invocation of receiver's page fault handler
15-18 unless  ENTRYLO word indicates PTE is valid and writable goto l56 L4.14
19-23 construct ENTRYHI value by masking off low order 13 bits of faulting VA to get VPN2 and ORing in the senders asid